DocumentCode :
932004
Title :
The Megacell concept: an approach to painless custom design
Author :
Brothers, J.S. ; Tomkins, J.W. ; Williams, J.S.
Author_Institution :
Plessey Semiconductors Ltd., Swindon, UK
Volume :
132
Issue :
2
fYear :
1985
fDate :
3/1/1985 12:00:00 AM
Firstpage :
91
Lastpage :
98
Abstract :
Megacell is a complete design package for the creation of complex VLSI chips. It allows system engineers to develop their own custom integrated circuits. The challenge of Megacell was to create a design system that would exploit fully the low-power and high-speed performance of a UK developed 2 ¿¿m CMOS technology, while producing the silicon utilisation efficiency typical of full custom design. This was accomplished without losing the now familiar semicustom design attributes of `first-time success¿¿, coupled with facilities for the user to complete his own design. The full features of the Megacell design system are described, and projections are made of how its capabilities will be extended as CMOS technology edges towards 1 ¿¿m. The provision of a series of cell structures of increasing complexity within Megacell allows the user to optimise his layout, without inducing the uncharacterised variations that would be usual in a full custom design. The cell structure has within it three major types: microcells which are the low-level logic cells found in most array or cell design systems; paracells which are cells of high functional capability, compiled by user software specifically for the customer´s application. The paracell is created from parameters, input by the user, as he designs his circuit; and supracells which have the highest complexity and are cells that replicate the function of today´s LSI standard products. They include not only digital functions, such as microprocessors, but also analogue blocks such as A/D and D/A convertors. The heart of the Megacell design system is its CAD. Alongside the cell structures, a comprehensive set of integrated design tools has been developed to cover the complete spectrum of user requirements. Included in the system are schematic capture, simulation, test validation and generation, as well as full layout capabilities.
Keywords :
CMOS integrated circuits; VLSI; circuit CAD; integrated circuit technology; 2 ¿¿m CMOS technology; Megacell design system; VLSI circuit CAD; cell structures; complex VLSI chips; custom integrated circuits; integrated design tools; microcells; paracells; supracells;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
DOI :
10.1049/ip-e.1985.0013
Filename :
4646444
Link To Document :
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