Title :
A compact threshold voltage model for gate misalignment effect of DG FD SOI nMOS devices considering fringing electric field effects
Author :
Kuo, James B. ; Sun, Elvis C.
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
4/1/2004 12:00:00 AM
Abstract :
This paper reports an analysis of gate misalignment effect on the threshold voltage of double-gate ultrathin fully depleted silicon-on-insulator nMOS devices using a compact model considering the fringing electric field effect, biased at zero-bias VDS. Using the conformal mapping transformation approach, a closed-form compact model considering the fringing electric field effect in the nongate overlap region has been derived to provide an accurate prediction of the threshold voltage behavior as verified by the two-dimensional simulation results.
Keywords :
MOSFET; electric breakdown; semiconductor device breakdown; semiconductor device models; silicon-on-insulator; DG FD SOI nMOS devices; Si-SiO2; closed-form compact model; conformal mapping transformation; double-gate ultrathin fully depleted silicon-on-insulator nMOS devices; fringing electric field effects; gate misalignment effect; nongate overlap region; threshold voltage behavior prediction; threshold voltage model; two-dimensional simulation; zero-bias; Analytical models; CMOS technology; Conformal mapping; MOS devices; Poisson equations; Predictive models; Silicon on insulator technology; Sun; Thin film devices; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2004.825108
