DocumentCode :
933574
Title :
The message-driven processor: a multicomputer processing node with efficient mechanisms
Author :
Dally, William J. ; Fiske, J. A Stuart ; Keen, John S. ; Lethin, Richard A. ; Noakes, Michael D. ; Nuth, Peter R. ; Davison, Roy E. ; Fyler, Gregory A.
Author_Institution :
Artificial Intelligence Lab., MIT, Cambridge, MA, USA
Volume :
12
Issue :
2
fYear :
1992
fDate :
4/1/1992 12:00:00 AM
Firstpage :
23
Lastpage :
39
Abstract :
The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. The MDP chip includes a processor, a 4096-word by 36-b memory, and a network port. An on-chip memory controller with error checking and correction (ECC) permits local memory to be expanded to one million words by adding external DRAM chips. The MDP incorporates primitive mechanisms for communication, synchronization, and naming which support most proposed parallel programming models. The MDP system architecture, instruction set architecture, network architecture, implementation, and software are discussed.<>
Keywords :
microprocessor chips; multiprocessing systems; 36 bit; 4096-word; MDP; VLSI microcomputer; instruction set architecture; message-driven processor; network architecture; system architecture; Computational modeling; Computer errors; Computer networks; Concurrent computing; Error correction; Error correction codes; Hardware; Parallel processing; Parallel programming; Very large scale integration;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.127581
Filename :
127581
Link To Document :
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