Depletion-enhanced body-isolation (DEBI) array on SOI for highly scalable and reliable NAND flash memories

Author

Park, Il Han ; Kim, Tae Hun ; Cho, Seongjae ; Lee, Jung Hoon ; Lee, Jong Duk ; Park, Byung-Gook

Author_Institution

Sch. of Electr. Eng., Inter-Univ. Semicond. Res. Center, Seoul, South Korea

Volume

5

Issue

3

fYear

2006

fDate

5/1/2006 12:00:00 AM

Firstpage

201

Lastpage

204

Abstract

A novel array architecture [depletion-enhanced body-isolation (DEBI)] has been proposed for NAND-type flash memories, and its memory characteristics are investigated in detail by device simulations. Having the shallow junctions on the thin active area, the proposed array architecture achieves high device performances with a fully depleted silicon-on-insulator (FDSOI) structure and enables stable erase operation without any problems based on an SOI structure. In particular, during the program operation, the DEBI architecture exhibited excellent self-boost efficiency originating from the isolated body. This can reduce the program disturbance effectively and can lower the V_pass voltages.

Keywords

flash memories; logic design; logic gates; reliability; silicon-on-insulator; DEBI; NAND flash memories; array architecture; depletion-enhanced body-isolation array; device simulations; fully depleted silicon-on-insulator structure; high device performances; memory characteristics; program disturbance; shallow junctions; stable erase operation; Body regions; Flash memory; Low voltage; Maintenance; Silicon on insulator technology; Array; NAND; depletion-enhanced body-isolation (DEBI); disturbance; flash; self-boost; silicon-on-insulator (SOI);

fLanguage

English

Journal_Title

Nanotechnology, IEEE Transactions on

Publisher

ieee

ISSN

1536-125X

Type

jour

DOI

10.1109/TNANO.2006.869951

Filename

1632134