Experimental realization of floating-gate-memory thin-film transistor

CdSe thin-film nonvolatile memory transistors have been made using the concept of a double-insulator structure with a thin floating gate inserted at the interface of the two insulators. The thin floating gate enhanced the charging and charge-retention behaviors of the memory transistors. On/off conductance ratio of greater than 1000 has been achieved. Writing speed on the order of microseconds is possible.