Multimemory block structure for implementing a digital adaptive filter using distributed arithmetic

A new structure of adaptive transversal filters with a large number of taps is described. It is based on the use of the distributed-arithmetic technique without any multiplier in the realisation of the filter function. In this structure, the N filter taps are divided into M blocks, each with R taps. These M blocks operate simultaneously and thus achieve a high-speed signal processing capability. This type of adaptive filter can easily be implemented by using microprocessor or transistor-transistor logic integrated circuits. A simplified hardware prototype module suitable for 8- and 16-point transversal adaptive filters, using microprocessor and simple peripheral interface circuitry, is presented. Results from this prototype demonstrate the basic feasibility of this structure for implementing digital adaptive filters with a large number of taps.