DocumentCode
935109
Title
Hybrid, Incremental Assertion-Based Verification for TLM Design Flows
Author
Bombieri, Nicola ; Fummi, Franco ; Pravadelli, Graziano ; Fedeli, Andrea
Author_Institution
Univ. of Verona, Verona
Volume
24
Issue
2
fYear
2007
Firstpage
140
Lastpage
152
Abstract
Transaction-level modeling is an emerging design practice for overcoming increasing design complexity. This article proposes a methodology for verifying the correctness of RTL refinement from transaction-level modeling. The authors demonstrate the effectiveness of this methodology, guided by an assertion coverage metric on the modules of an industry design.
Keywords
formal verification; transaction processing; RTL refinement; TLM design flows; hybrid incremental assertion-based verification methodology; industry design; transaction-level modeling; Computer bugs; Design methodology; Digital systems; Electronic design automation and methodology; Embedded system; Power system modeling; Protocols; Software testing; System testing; Timing; RTL; TLM; assertion-based verification; design flow; hybrid;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2007.48
Filename
4237492
Link To Document