DocumentCode
935164
Title
Radix-2n multiplier structures: a structured design methodology
Author
Ibrahim, M.K.
Author_Institution
Dept. of Electr. & Electron. Eng., Nottingham Univ., UK
Volume
140
Issue
4
fYear
1993
fDate
7/1/1993 12:00:00 AM
Firstpage
185
Lastpage
190
Abstract
A new radix-2n multiplication algorithm is presented which is iterative and modular. The algorithm is a true generalisation of the radix-2 (conventional binary) multiplication algorithm. As a result, existing radix-2 (binary) structures can easily be generalised for all radices. The architecture of the basic cell is not fixed for all radices: any architecture can be used if its functionality satisfies the multiply/add principle presented. The multiplier architecture is first defined in terms of the radix-2n multiplication algorithm which is general for all n. This results in an architecture being available for every n. The tradeoff between cost and time is achieved by optimising the basic cell architecture for each radix and choosing the radix that results in the best performance. This approach is applied to the design of serial and serial/parallel multipliers, and an iterative multiplier array.
Keywords
logic arrays; logic design; multiplying circuits; cell architecture; functionality; iterative multiplier array; multiply/add principle; radix-2n multiplication algorithm; serial/parallel multipliers; structured design methodology;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
Filename
232034
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