• DocumentCode
    935185
  • Title

    SIMD matrix methods for detecting hazards in logic circuits

  • Author

    Heal, B.W. ; Page, R.M.R.

  • Author_Institution
    Dept. of Inf. Sci., Portsmouth Univ., UK
  • Volume
    140
  • Issue
    4
  • fYear
    1993
  • fDate
    7/1/1993 12:00:00 AM
  • Firstpage
    201
  • Lastpage
    204
  • Abstract
    The paper describes the underlying theory and an outline for an algorithm which is designed to utilise the power of SIMD computers to detect and locate the presence of logic hazards in combinational logic circuits.
  • Keywords
    combinatorial circuits; fault location; logic testing; matrix algebra; parallel processing; SIMD matrix methods; combinational logic circuits; hazards detection;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings E
  • Publisher
    iet
  • ISSN
    0143-7062
  • Type

    jour

  • Filename
    232037
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=935185