Title :
Asynchronous polling arbiter
Author_Institution :
University of Hull, Department of Electronic Engineering, Kingston upon Hull, UK
Abstract :
Details of a simple polling arbiter used to control the access of a common resource by n independently clocked digital systems (processors) are given. The design, which minimises the number of asynchronous circuits needed, requires only n+2 interconnection lines.
Keywords :
computer architecture; multiprocessing systems; asynchronous polling arbiter; common resource; n independently clocked digital systems;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19760034
