Title :
Low-hardware complexity PRBGs based on a piecewise-linear chaotic map
Author :
Addabbo, T. ; Alioto, M. ; Fort, A. ; Rocchi, S. ; Vignoli, V.
Author_Institution :
Inf. Eng. Dept., Univ. of Siena, Italy
fDate :
5/1/2006 12:00:00 AM
Abstract :
In this brief, a family of discretized one-dimensional chaotic maps derived from the Sawtooth map is analyzed to evaluate its suitability for the integrated implementation of low-complexity digital pseudorandom bit generators (PRBGs). The proposed PRBGs, classifiable as nonlinear congruential generators, are investigated in terms of period length, statistical properties of the generated sequences, hardware complexity, and are compared with traditional PRBGs.
Keywords :
chaos; circuit complexity; digital integrated circuits; piecewise linear techniques; random number generation; PRBG; digital integrated circuits; digital pseudorandom bit generator; discretized 1D chaotic maps; nonlinear congruential generators; piecewise-linear chaotic map; sawtooth map; Binary sequences; Chaos; Circuit testing; Cryptography; Digital circuits; Hardware; Performance analysis; Piecewise linear techniques; State-space methods; System testing; Digital integrated circuits; discretized chaotic maps; pseudorandom bit generators (PRBGs);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2005.862176