Implementation-independent model of an instruction set architecture in VHDL

Author

Salinas, Maxlmoh ; Johnson, Barry W. ; Aylor, James H.

Author_Institution

Dept. of Electr. Eng., Virginia Univ., Charlottesville, VA, USA

Volume

10

Issue

3

fYear

1993

Firstpage

42

Lastpage

54

Abstract

A methodology using a VHDL (VHSIC hardware description language) to create executable models of computer architectures independent of implementation attributes is described. The authors present such a model of a processor architecture known as the WM as the first step in developing an implementation. Simulations using the model can provide performance measurements such as potential parallelism. The model can also serve as an architectural specification for the computer.<>

Keywords

computer architecture; instruction sets; specification languages; VHDL; VHSIC; WM; architectural specification; computer architectures; hardware description language; implementation-independent model; instruction set architecture; performance measurements; processor architecture; Clocks; Computational modeling; Computer architecture; Hardware design languages; High speed integrated circuits; Integrated circuit modeling; Parallel processing; Process design; Synchronization; Very high speed integrated circuits;

fLanguage

English

Journal_Title

Design & Test of Computers, IEEE

Publisher

ieee

ISSN

0740-7475

Type

jour

DOI

10.1109/54.232471

Filename

232471