Title :
Design and architecture of multiplier-free FIR filters using periodically time-varying ternary coefficients
Author :
Ghanekar, Sachin ; Tantaratana, Sawasd ; Franks, Lewis E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fDate :
5/1/1993 12:00:00 AM
Abstract :
Multiplier-free realizations for FIR filters are proposed. The realizations use a periodically time-varying (PTV) system, flanked by simple units for upsampling and downsampling to achieve time-invariant multiplier-free FIR filter operation. The PTV system uses only ternary (0, ±1) coefficients, and the units before and after the PTV system use only power-of-two scalers. Therefore, the realizations can be implemented with only add/subtract operations. Some architectures for the proposed structures are also presented
Keywords :
digital arithmetic; digital filters; add/subtract operations; downsampling; multiplier-free FIR filters; periodically time-varying ternary coefficients; power-of-two scalers; time-invariant filters; upsampling; Added delay; Adders; Circuits; Digital filters; Digital signal processing; Encoding; Finite impulse response filter; Hardware; Time varying systems; Very large scale integration;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on