Title :
A defect-tolerant memory architecture for molecular electronics
Author :
Lee, Myung-Hyun ; Kim, Young Kwan ; Choi, Yoon-Hwa
Author_Institution :
Dept. of Comput. Eng., Hongik Univ., Seoul, South Korea
fDate :
3/1/2004 12:00:00 AM
Abstract :
This paper presents a defect-tolerant memory architecture for molecular electronics. A crossbar structure, where molecules are sandwiched between nanowires, is used as a model to realize molecular memory and to achieve defect tolerance. Defects in the logic circuits for addressing memory are also taken into account. The number of spare rows and columns to form a functioning memory is estimated by computer simulation for various values of defect rate and memory size.
Keywords :
digital simulation; logic circuits; memory architecture; molecular electronics; nanowires; computer simulation; defect rate; defect tolerant memory architecture; logic circuits; memory size; molecular electronics; molecular memory; nanowires; spare columns; spare rows; Circuit testing; Logic circuits; Logic devices; Logic functions; Memory architecture; Molecular electronics; Multiplexing; Nanowires; Switches; Wires;
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2004.824011
