Using polynomic embedding for neural network design

Neural networks are characterized by the recursive equation x (l+1)=F{K[Ψ[Sx(l )]]}, l⩾1 and x(l)∈Rⁿ. F is a capture function of a finite alphabet, Ψ is a polynomic embedding map, and K and S are linear maps. These functions are shown to be compatible with systolic array implementation, providing the highly desirable feature of VLSI compatibility. The layering of computations on the array is demonstrated. This establishes the capability of simultaneously running independent recognition problems on the same array. Several simulations demonstrate that the work capacity substantially exceeds the dimensionality of the training set. Rapid iterative convergence, negligible false recognitions, and robustness are additional properties of the network