Bus scheduling for a multiple-processor system with shared buses

The operation and performance of a multiple-processor system with shared buses is analysed. The model developed is applicable to real-time computations consisting of two pipelined tasks in which the first task is partitioned into a number of independent subtasks on separate processors. These processors transmit their output data to the processor(s) executing the second task over shared buses. When the system has a single shared bus, it is shown that its operation becomes periodic after a number of task executions. Expressions for the cycle time and the system throughput are derived. Two schemes are then proposed for scheduling the data transmissions on a multiple-bus system so as to minimise the corresponding cycle times. The computational complexity of the scheduling problems is studied, and exact, approximate and heuristic algorithms are developed for their solution.