DocumentCode :
939230
Title :
System-in-package testing: problems and solutions
Author :
Appello, Davide ; Bernardi, Paolo ; Grosso, Michelangelo ; Reorda, Matteo Sonza
Volume :
23
Issue :
3
fYear :
2006
Firstpage :
203
Lastpage :
211
Abstract :
System-in-package integrates multiple dies in a common package. Therefore, testing SiP technology is different from system-on-chip, which integrates multiple vendor parts. This article provides test strategies for known good die and known good substrate in the SiP. Case studies prove feasibility using the IEEE 1500 test structure
Keywords :
IEEE standards; integrated circuit testing; substrates; system-in-package; IEEE 1500 test structure; system-in-package testing; Assembly; Computer architecture; Costs; Manufacturing; Packaging; Performance evaluation; Space technology; Standards development; System testing; System-on-a-chip; IEEE1500 SECT; KGD; SiP; SoC; System-in-Package; System-on-Chip; System-on-Package; test access mechanism;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2006.79
Filename :
1634289
Link To Document :
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