Title :
Packaging a 40-Gbps serial link using a wire-bonded plastic ball grid array
Author :
Kam, Dong Gun ; Kim, Joungho ; Yu, Jiheon ; Choi, Ho ; Bae, KiCheol ; Lee, ChoonHeung
Author_Institution :
Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul
Abstract :
System-in-package provides highly integrated packaging with high-speed performance. Many SiP packages contain low-cost 3D stacked chips interconnected by fine wire bonds. In a high-frequency spectrum, these wire bonds can cause discontinuities causing signal degradation. This article addresses problems with wire bonding in high-frequency SiP packages and proposes design methodologies to reduce these discontinuities
Keywords :
integrated circuit bonding; integrated circuit design; integrated circuit interconnections; lead bonding; system-in-package; 3D stacked chip; 40 Gbit/s; 40-Gbps serial link; signal degradation; system-in-package; wire-bonded plastic ball grid array; Bonding; Capacitance; Degradation; Design methodology; Electronics packaging; Inductance; Microwave integrated circuits; Plastic packaging; Wire; 40 Gb/s Serial Link; SiP; System-in-Package; WB-PBGA; chip-to-chip serial link; wire bonded plastic ball grid array;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2006.78
