DocumentCode :
939879
Title :
Benchmarking for large-scale placement and beyond
Author :
Adya, Saurabh N. ; Yildiz, Mehmet C. ; Markov, Igor L. ; Villarrubia, Paul G. ; Parakh, Phiroze N. ; Madden, Patrick H.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
Volume :
23
Issue :
4
fYear :
2004
fDate :
4/1/2004 12:00:00 AM
Firstpage :
472
Lastpage :
487
Abstract :
Over the last five years, the large scale integrated circuit placement community achieved great strides in the understanding of placement problems, developed new high-performance algorithms, and achieved impressive empirical results. These advances have been supported by a nontrivial benchmarking infrastructure, and future achievements are set to draw on benchmarking as well. In this paper, we review motivations for benchmarking, especially for commercial electronic design automation, analyze available benchmarks, and point out major pitfalls in benchmarking. Our empirical data offers perhaps the first comprehensive evaluation of several leading large-scale placers on multiple benchmark families. We outline major outstanding problems and discuss the future of placement benchmarking. Furthermore, we attempt to extrapolate our experience to circuit layout tasks beyond placement.
Keywords :
benchmark testing; integrated circuit layout; benchmarking; circuit layout; commercial electronic design automation; integrated circuit placement; large-scale placement; large-scale placers; Availability; Circuit testing; Design automation; Electronic design automation and methodology; Field programmable gate arrays; Large scale integration; Large-scale systems; Routing; Timing; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2004.825852
Filename :
1278525
Link To Document :
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