High-performance p-type independent-gate FinFETs

Author

Fried, D.M. ; Duster, J.S. ; Kornegay, K.T.

Author_Institution

Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA

Volume

25

Issue

4

fYear

2004

fDate

4/1/2004 12:00:00 AM

Firstpage

199

Lastpage

201

Abstract

We present, to our knowledge, the first successful integration of two independent gates on a p-type FinFET. These results also represent a significant performance improvement over previously reported Independent-Gate FinFET results. The devices have gate lengths ranging from 0.5 to 5 μm, and designed fin thicknesses ranging from 25 to 75 nm. Electrical results show near-ideal subthreshold slopes in double-gate mode (both gates modulated simultaneously). Independent-Gate operation is also examined by modulating saturated drain current with both front and back-gate voltages independently. The results are compiled to analyze performance trends versus fin thickness and gate length.

Keywords

MOSFET; 0.5 to 5 micron; 25 to 75 nm; back-gate voltage; double-gate mode; fin thickness; front-gate voltage; gate lengths; high-performance p-type independent-gate FinFETs; near-ideal subthreshold slopes; p-type FinFET; saturated drain current modulation; CMOS process; CMOS technology; Etching; Fabrication; FinFETs; Lithography; MOSFET circuits; Rapid thermal annealing; Semiconductor films; Silicon on insulator technology;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2004.825160

Filename

1278555