Author :
McAdams, Hugh P. ; Acklin, Randy ; Blake, Terry ; Du, Xiao-Hong ; Eliason, Jarrod ; Fong, John ; Kraus, William F. ; Liu, David ; Madan, Sudhir ; Moise, Ted ; Natarajan, Sreedhar ; Qian, Ning ; Qiu, Yunchen ; Remack, Keith A. ; Rodriguez, John ; Roscher,
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
A low-voltage (1.3 V) 64-Mb ferroelectric random access memory (FRAM) using a one-transistor one-capacitor (1T1C) cell has been fabricated using a state-of-the-art 130-nm transistor and a five-level Cu/flouro-silicate glass (FSG) interconnect process. Only two additional masks are required for integration of the ferroelectric module into a single-gate-oxide low-voltage logic process. Novel overwrite sense amplifier and programmable ferroelectric reference generation schemes are employed for fast reliable read-write cycle operation. Address access time for the memory is less than 30 ns while consuming less than 0.8 mW/MHz at 1.37 V. An embedded FRAM (eFRAM) density of 1.13 Mb/mm2 is achieved with a cell size of 0.54 μm2 and capacitor size of 0.25 μm2.
Keywords :
CMOS logic circuits; CMOS memory circuits; embedded systems; ferroelectric storage; integrated circuit interconnections; random-access storage; 1.3 V; 130 nm; 64 Mbit; Cu-FSG logic process; copper-fluoro-silicate glass interconnect; embedded FRAM; ferroelectric module; ferroelectric random access memory; masking; one-transistor one-capacitor cell; overwrite sense amplifier; programmable ferroelectric reference generation scheme; read-write cycle; single-gate-oxide low-voltage logic process; Capacitors; Cost function; Ferroelectric films; Ferroelectric materials; Glass; Logic; Nonvolatile memory; Operational amplifiers; Random access memory; Voltage;
