Logic and Computer Design in Nanospace

Techniques for the advanced logic design of nanodevices and nanolCs in spatial dimensions are being formulated to incorporate specific topologies that satisfy certain requirements of nanotechnology. One of these topologies, the hypercube, is currently being considered for the design of a network-based combinational logic implementation in the form of a hypercube extension called the N-hypercube. We propose the M-hypercube, using a similar topology to design any sequential logic in spatial dimensions. To reduce the complexity of the M-hypercube design, two methods, a top-down and a bottom-up, are presented. The former uses sequential machine decomposition methods and the latter uses a new hypercube topology, called the MN-cell. The MN-cell, consisting of two closely coupled 2D hypercubes, an M-hypercube and an N-hypercube, is a 3D hypercube. It is shown that MN-cells can implement flip-flops and thus can be used as building blocks for sequential logic design in nanodimensions. The logic design of a basic computer in nanospace using MN-cells and N-hypercubes is also presented using several examples.