Title :
High speed I2L gate with self-aligned double-diffusion injector
Author_Institution :
Tokyo Shibaura Electric Co. Ltd., Toshiba Research & Development Center, Kawasaki, Japan
Abstract :
To improve the switching speed of I2L gate, the charge storage in the n¿p¿n transistor should be minimised. For the experimental verification of a high-speed I2L gate, a very small I2L gate with p+ external base and heavily doped emitter regions was fabricated. The minimum propagation delay realised in the gate was 3.2 n s/gate.
Keywords :
integrated logic circuits; logic gates; semiconductor doping; I2L gate; charge storage; heavily doped emitter regions; n-p-n transistor; p+ external base; propagation delay; self aligned double diffusion injector; switching speed;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19770005
