Performance of MVTL OR-AND gates when data precedes bias

Author

Meier, D.L. ; Przybysz, J.X.

Author_Institution

Westinghouse Sci. & Technol. Center, Pittsburgh, PA, USA

Volume

3

Issue

1

fYear

1993

fDate

3/1/1993 12:00:00 AM

Firstpage

2736

Lastpage

2739

Abstract

A six-stage shift register based on modified-variable-threshold-logic (MVTL) OR-AND gates using 90 Nb/Al-Al/sub 2/O/sub 3//Nb Josephson junctions has been fabricated and tested up to 3.0 GHz. Bias current margins of the shift register were measured to be +or-26% at 200 MHz and below, +or-11% at 2.2 GHz, and +or-1.2% at 3.0 GHz. Calculation of the lobe plots for the OR gate shows that the expected margin is +or-26% when the control current (data) precedes the bias current (clock), and when no appreciable control current is injected into the superconducting quantum interference device (SQUID) loop via the injector junction. Special taps were included in the circuit so that the switching action of each of the 18 gates could be monitored in detail without disturbing the high-speed operation of the circuit.<>

Keywords

Josephson effect; SQUIDs; logic gates; shift registers; superconducting logic circuits; 200 MHz to 2.2 GHz; Josephson junctions; MVTL OR-AND gates; Nb-Al/sub 2/O/sub 3/-Nb; Nb/Al-Al/sub 2/O/sub 3//Nb; SQUID loop; high-speed operation; modified-variable-threshold-logic; six-stage shift register; superconducting quantum interference device; switching action; Circuits; Clocks; Current measurement; Interference; Josephson junctions; Niobium; SQUIDs; Shift registers; Superconducting devices; Testing;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.233515

Filename

233515