DocumentCode :
942014
Title :
Primary Input Vectors to Avoid in Random Test Sequences for Synchronous Sequential Circuits
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Purdue Univ., West Lafayette
Volume :
27
Issue :
1
fYear :
2008
Firstpage :
193
Lastpage :
197
Abstract :
Random test sequences may be used for manufacturing testing as well as for simulation-based design verification. This paper studies one of the reasons for the fact that random primary input sequences achieve very low fault coverage for synchronous sequential circuits. It is shown that a synchronous sequential circuit may have input cubes, or incompletely specified input vectors, that synchronize a subset of its state variables, i.e., it forces them to certain specified values. When an input cube c that synchronizes the subset of state variables S(c) has a small number of specified inputs, the input vectors covered by it may appear often in a random primary input sequence. As a result, the sequence will force the same values on the state variables in S(c) repeatedly. This may limit the fault coverage that the sequence can obtain. To address this issue, a procedure is described for modifying a random primary input sequence to eliminate the appearance of input vectors that synchronize subsets of state variables. It is demonstrated that this procedure has a significant effect on the fault coverage that can be achieved by random primary input sequences.
Keywords :
logic testing; random sequences; sequential circuits; fault coverage; manufacturing testing; primary input vectors; random test sequences; simulation-based design verification; synchronous sequential circuits; Random test sequences; random test sequences; synchronization; synchronous sequential circuits; test generation;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2007.907229
Filename :
4358498
Link To Document :
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