• DocumentCode
    942157
  • Title

    Synthesis of some partially symmetric Boolean functions by ternary algebra

  • Author

    Davio, M. ; Deschamps, J.-P.

  • Author_Institution
    MBLE Research Laboratory, Brussels, Belgium
  • Volume
    13
  • Issue
    16
  • fYear
    1977
  • Firstpage
    473
  • Lastpage
    474
  • Abstract
    A Boolean function of 2n arguments f(x,y) endowed with the partial symmetries x1~y1 may be described by a binary function ¿(w) of n ternary variables w1 = x1 + y1. The resulting synthesis yields a 4-level design of a circuit computing f(x, y). The method is applied to the design of a b.c.d. adder-convertor.
  • Keywords
    Boolean algebra; Boolean functions; logic circuits; binary coded decimal adder/convertor; partially symmetric Boolean functions; ternary algebra;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19770342
  • Filename
    4240461
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=942157