Stress Evolution Related to Metal Routing in Submicron Multilevel Interconnects: Void and Extrusion

Failure mechanism of submicron multilevel interconnects encapsulated in a quad flat package subjected to high temperature operating life (HTOL) test under temperature and bias has been investigated. With the presence of void formation in the upper metal, Al extrudes from the lower metal to the adjacent metal lines leading to a fatal short failure. Void itself is not critical but later the growth of extrusion compromises the integrity and circuit reliability. Such a failure mechanism is explained with stress evolution on the metal routing associated with tensile stress imposed on the upper metal adhered to a thicker interlayer dielectric on certain points then relived with void formation that triggers compressive stress on the lower metal layer causing Al extrusion. For the purpose of verification, a new layout of the metal routing is committed and subjected to the HTOL. We found that the aspect ratio of the metal line significantly influences the integrity of submicron multilevel interconnects.