Technique for Flicker Noise Up-Conversion Suppression in Differential LC Oscillators

Author

Tchamov, Nikolay N. ; Tchamov, Nikolay T.

Author_Institution

Tampere Univ. of Technol., Tampere

Volume

54

Issue

11

fYear

2007

Firstpage

959

Lastpage

963

Abstract

A novel technique for the suppression of the flicker noise up-conversion in a differential LC oscillator topology is proposed. Relaxation mechanism and tunable noise filtering of the relaxation thresholds provide simultaneous suppression of differential pair and bias transistor flicker noise contributions. The proposed technique is validated on a fully monolithic oscillator architecture and 0.35-mum standard CMOS process by Cadence SpectreRF for the frequency range of 2.9-5.9 GHz. The phase noise improvement at 10 kHz offset versus a single-differential-pair LC oscillator is 6-15 dB across the tuning range.

Keywords

CMOS analogue integrated circuits; MMIC oscillators; UHF oscillators; circuit tuning; flicker noise; integrated circuit noise; phase noise; CMOS process; bias transistor flicker noise contributions; differential LC oscillator topology; differential pair transistor flicker noise; flicker noise up-conversion suppression; frequency 2.9 GHz to 5.9 GHz; monolithic oscillator architecture; phase noise improvement; relaxation mechanism; relaxation thresholds; size 0.35 mum; tunable noise filtering; Flicker noise; RF CMOS; integrated oscillator;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2007.904135

Filename

4358626