Title :
A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump
Author :
Chuang, Chi-Nan ; Liu, Shen-Iuan
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
A 0.5-5 GHz wide-range multiphase delay-locked loop (MDLL) with a calibrated charge pump is presented. A multiperiod-locked technique is used to enhance the input frequency range of a MDLL and avoid the harmonic-locked problem. The charge pump current is also calibrated to reduce the static phase error. This MDLL has been fabricated in 0.13- CMOS process. The measured root-mean-square and peak-to-peak jitters are 1.06 and 8 ps at 5 GHz, respectively. The power dissipation at 5 GHz is 36 mW for a supply voltage of 1.2 V.
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; delay lock loops; microwave integrated circuits; CMOS process; calibrated charge pump; charge pump current; frequency 0.5 GHz to 5 GHz; harmonic locked; multiperiod locked; multiphase DLL; multiphase delay-locked loop; power 36 mW; power dissipation; root-mean-square; size 0.13 mum; static phase error; voltage 1.2 V; wide-range DLL; Calibration; charge pump; delay-locked loop; multiperiod-locked technique;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2007.904155
