Voltage Gain Analysis of Integrated Fibonacci-Like Charge Pumps for Low Power Applications

This paper presents an analysis of the achievable voltage gain in integrated Fibonacci-like charge pumps. The analysis is carried out by using a mathematical model based on a matrix description of the network which takes parasitic capacitances into account. The impact of top- and bottom-plate parasitics over the voltage gain is discussed and the analytical expression of the voltage gain as a function of parasitic capacitances is obtained. The derived set of equations is validated by means of circuit level simulations.