Title :
Physical subthreshold MOSFET modeling applied to viable design of deep-submicrometer fully depleted SOI low-voltage CMOS technology
Author :
Yeh, Ping Chin ; Fossum, Jerry G.
Author_Institution :
Dept. of Electr. Eng., Florida Univ., Gainesville, FL, USA
fDate :
9/1/1995 12:00:00 AM
Abstract :
An insightful study of the subthreshold characteristics of deep-submicrometer fully depleted SOI MOSFET´s, based on two-dimensional numerical (PISCES) device simulations, shows that the gate swing and off-state current are governed by gate bias-dependent source/drain charge sharing, which controls back-channel as well as front-channel conduction. The insight from this study guides the development of a physical, two-dimensional analytic model for the subthreshold current and charge, which is linked to our strong-inversion formalism in SOISPICE for circuit simulation. The model is verified by PISCES simulations of scaled devices. The utility of the model in SOISPICE is demonstrated by using it to define a viable design for deep-submicrometer fully depleted SOI CMOS technology based on simulated speed and static power in low-voltage digital circuits
Keywords :
CMOS digital integrated circuits; MOSFET; SPICE; VLSI; circuit analysis computing; integrated circuit modelling; semiconductor device models; silicon-on-insulator; PISCES; SOISPICE; back-channel conduction; circuit simulation; deep-submicrometer fully depleted SOI MOSFET; front-channel conduction; gate swing; low-voltage CMOS technology; low-voltage digital circuits; off-state current; physical subthreshold MOSFET modeling; source/drain charge sharing; static power; subthreshold characteristics; two-dimensional analytic model; two-dimensional numerical device simulations; CMOS digital integrated circuits; CMOS technology; Circuit simulation; Digital circuits; MOSFET circuits; Numerical simulation; Physics; Semiconductor device modeling; Subthreshold current; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
