DocumentCode
943357
Title
New gate model for the transient analysis of logic systems
Author
Murray-Shelley, R. ; Arlett, P.L.
Author_Institution
James Cook University of North Queensland, Department of Electrical Engineering, Townsville, Australia
Volume
13
Issue
21
fYear
1977
Firstpage
639
Lastpage
640
Abstract
An extension of the graphical technique for the propagation of signals through logic systems is proposed. Nonlinearities-and transport delays are catered for, and the gate model used is simple and suited to calculation in large systems. A system is examined graphically and the results are compared with those obtained experimentally.
Keywords
logic circuits; switching theory; time-domain analysis; transients; gate model; graphical technique; logic systems; transient analysis;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19770456
Filename
4240600
Link To Document