The relationship of holding points and a general solution for CMOS latchup

Author

Sleeter, David J. ; Enlow, Edward W.

Author_Institution

Mission Research Corp., Albuquerque, NM, USA

Volume

39

Issue

11

fYear

1992

fDate

11/1/1992 12:00:00 AM

Firstpage

2592

Lastpage

2599

Abstract

The holding point for CMOS latchup has been studied empirically and analytically using a semiconductor device physics code. A relationship between holding current and voltage has been identified that shows variations in doping, layout, epitaxy, and temperature produce different holding points that all fall on the same I- V curve. Analysis of the fields and carrier densities within negative resistance has provided new insight into the latchup response. A general solution for voltage as a function of current, valid at all points above switching, has been derived based on fields and carriers. The solution explains the relationship of holding points observed in empirical data

Keywords

CMOS integrated circuits; CMOS latchup; I-V curve; carrier densities; doping; empirical data; epitaxy; general solution; holding current; holding points; latchup response; layout; negative resistance; semiconductor device physics code; temperature; Circuits; Design optimization; Doping; Epitaxial growth; Geometry; Latches; Physics; Semiconductor device modeling; Switches; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.163468

Filename

163468