Title :
Bit-Stream Adders and Multipliers for Tri-Level Sigma–Delta Modulators
Author :
Ng, Chiu-Wa ; Wong, Ngai ; Ng, Tung-Sang
Author_Institution :
Univ. of Hong Kong, Hong Kong
Abstract :
We propose both adder and multiplier circuits for bit-stream signal processing customized for tri-level sigma-delta modulated signals. These architectures are the 2-bit extensions from the existing 1-bit bit-stream adders and multipliers, and are shown to offer better signal-to-noise performance. Field-programmable gate array implementations then confirm their efficacy.
Keywords :
adders; field programmable gate arrays; multiplying circuits; sigma-delta modulation; signal sampling; FPGA; adder circuits; bit-stream signal processing; field-programmable gate array; multiplier circuits; oversampling; signal-to-noise performance; tri-level sigma-delta modulators; Adder circuit; multiplier circuit; oversampling; tri-level sigma–delta modulation; tri-level sigma-delta modulation;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2007.906173
