DocumentCode
946512
Title
´Bootstrapping´ in Josephson tunnelling logic circuits
Author
Yamada, Hajime ; Ishida, Akira
Author_Institution
NTT, Musashino Electrical Communication Laboratory, Musashino, Japan
Volume
14
Issue
10
fYear
1978
Firstpage
300
Lastpage
302
Abstract
´Bootstrapping´ in Josephson tunnelling logic circuits has been realised by providing series connection of multiple junctions and feedback of output current as an additional control current. Computer simulations have demonstrated that the speed-up of the circuits is successfully achieved. This configuration is effective for high-fanout logic circuits, memory peripheral circuits, etc.
Keywords
bootstrap circuits; logic circuits; superconducting junction devices; Josephson tunnelling logic circuits; bootstrapping; computer simulation; high fanout logic circuits; memory peripheral circuits;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19780204
Filename
4241088
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