Title :
Shift-register connections for delayed versions of m-sequences
Author_Institution :
Delft University of Technology, Computer Laboratory, Department of Electrical Engineering, Delft, Netherlands
Abstract :
A fast and simple method is introduced that can be used, both manually and in computing, to determine which linear combination of shift-register outputs corresponds to a d-bit delayed version of a maximal-length linear binary sequence. The calculation time is proportional to the logarithm of d. The method is suitable for generating large phase shifts.
Keywords :
binary sequences; shift registers; d-bit delayed version; generating large phase shifts; linear combination; m-sequences; maximal length linear binary sequence; modulo 2 addition method; shift register connections; shift register outputs;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19780480