DocumentCode :
948335
Title :
Shift-register connections for delayed versions of m-sequences
Author :
van Luyn, A.N.
Author_Institution :
Delft University of Technology, Computer Laboratory, Department of Electrical Engineering, Delft, Netherlands
Volume :
14
Issue :
22
fYear :
1978
Firstpage :
713
Lastpage :
715
Abstract :
A fast and simple method is introduced that can be used, both manually and in computing, to determine which linear combination of shift-register outputs corresponds to a d-bit delayed version of a maximal-length linear binary sequence. The calculation time is proportional to the logarithm of d. The method is suitable for generating large phase shifts.
Keywords :
binary sequences; shift registers; d-bit delayed version; generating large phase shifts; linear combination; m-sequences; maximal length linear binary sequence; modulo 2 addition method; shift register connections; shift register outputs;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19780480
Filename :
4242684
Link To Document :
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