DocumentCode
949662
Title
A 20 bit stereo oversampled D-to-A converter
Author
Maruyama, Yuichi ; Takeuchi, Osamu ; Sakurai, Akinori ; Okamoto, Toshiyuki ; Yukawa, Akira
Author_Institution
NEC Corp., Kawasaki, Japan
Volume
39
Issue
3
fYear
1993
Firstpage
274
Lastpage
276
Abstract
A 20 b stereo D-to-A (digital-to-analog) converter is realized using fourth-order delta-sigma oversampling technology. A 110 dB signal-to-noise ratio and a 0.001% harmonic distortion are measured for a PDM output signal employing an oversampling ratio of 128. The chip operates with a single 2.7 V power supply and consumes 33 mW. It is implemented in a 3.6 mm×4.0 mm chip area using 0.8 μm CMOS technology
Keywords
CMOS integrated circuits; digital-analogue conversion; 110 dB signal-to-noise ratio; 2.7 V; 20 bit; 20 bit stereo oversampled D-to-A converter; 33 mW; CMOS technology; PDM output signal; fourth-order delta-sigma oversampling; harmonic distortion; power supply; CMOS technology; Circuit testing; Delta modulation; Digital signal processing; Distortion measurement; Finite impulse response filter; Harmonic distortion; Interpolation; Low voltage; Noise shaping;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/30.234593
Filename
234593
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