Title :
An area/time-efficient motion estimation micro core
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
An efficient microarchitecture for motion estimation is proposed. It achieves better time and area performance than the existing structures. Through pipelining and effective manipulation of two´s-complement arithmetic, the adder complexity is kept to its lowest, while speed for a combined subtraction, absolution, and accumulation operation is made as fast as a carry-save addition. Together with a new DCT (discrete cosine transform) algorithm, the microstructure is further expanded and tailored to facilitate efficient execution of other video operations, such as DCT and filtering operations
Keywords :
adders; computer architecture; discrete cosine transforms; encoding; image processing equipment; motion estimation; pipeline processing; video signals; DCT; adder complexity; carry-save addition; discrete cosine transform; filtering operations; microarchitecture; motion estimation; pipelining; two´s-complement arithmetic; video encoding; video operations; Adders; Arithmetic; Design optimization; Discrete cosine transforms; Encoding; Filtering; Motion estimation; Pipeline processing; Signal design; Video signal processing;
Journal_Title :
Consumer Electronics, IEEE Transactions on
