DocumentCode
949862
Title
Latent damage in CMOS devices from single-event latchup
Author
Becker, Heidi N. ; Miyahira, Tetsuo F. ; Johnston, Allan H.
Author_Institution
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Volume
49
Issue
6
fYear
2002
fDate
12/1/2002 12:00:00 AM
Firstpage
3009
Lastpage
3015
Abstract
Evaluation of several types of CMOS devices after nondestructive latchup revealed structural changes in interconnects that appears to be due to localized ejection of part of the metallization due to melting. This is a potential reliability hazard for CMOS devices because it creates localized voids within interconnects that reduce the cross section by one to two orders of magnitude in the damaged region. These effects must be considered when testing devices for damage from latchup, as well as in establishing limits for current detection and shutdown as a means of latchup protection.
Keywords
CMOS integrated circuits; analogue-digital conversion; digital signal processing chips; electromigration; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; ion beam effects; laser beam effects; melting; oscillators; space vehicle electronics; voids (solid); ADC; CMOS devices; DSP; cross section reduction; current detection limits; electromigration; heavy ion irradiation; interconnect structural changes; laser tests; latchup protection; latent damage; localized metallization ejection; localized voids; melting; nondestructive latchup; oscillator; reliability hazard; shutdown limits; single-event latchup; space applications; CMOS technology; Hazards; Integrated circuit interconnections; Metallization; NASA; Optical microscopy; Propulsion; Protection; Space technology; Testing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2002.805332
Filename
1134254
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