Abstract :
During all the system design phase of an SPC switching system, a considerable effort is devoted to maintenance, both from a hardware and software point of view. The maintenance phases include fault detection, fault analysis (e.g., identification of the faulty security block within the switching system), fault isolation, fault reporting, fault localization, fault clearance, and restoration to service with the eventual requalification and reinitialization of the repaired security block. The paper mainly discusses fault detection and fault analysis strategies with specific reference to PCM digital switching systems. Different means leading to fault detection are presented with reference to central control, network access devices (scanners, drivers, markers), and digital switching network (duplicated or not duplicated). These means include automatic on-line tests (monitoring and routining), on-demand on-line tests, and alarm handling. Fault analysis can be accomplished by means of a deductive or a statistical method. As the latter seems more attractive, three basic methods of statistical fault analysis are presented. They use, respectively, two counters (operation and fault counter) per security block; one fault counter per security block; one "historical" fault stack, in which all the identities of security blocks involved in faulty operations are stored. The above fault analysis strategies are compared mainly in terms of core memory occupancy, processor time, and software complexity.
