A 9.6-Gb/s HEMT ATM switch LSI with event-controlled FIFO

Author

Watanabe, Yuu ; Nakasha, Yasuhiro ; Kato, Yuji ; Odani, Kohichiro ; Abe, Masayuki

Author_Institution

Fujitsu Lab. Ltd., Atsugi, Japan

Volume

28

Issue

9

fYear

1993

fDate

9/1/1993 12:00:00 AM

Firstpage

935

Lastpage

940

Abstract

An asynchronous-transfer-mode (ATM) switch LSI was designed for the broadband integrated services digital network (B-ISDN) and fabricated using 0.6-μm high-electron-mobility-transistor (HEMT) technology. To enhance the high-speed performance of direct-coupled FET logic (DCFL), event-controlled logic was used instead of conventional static memory for the first-in first-out (FIFO) buffer circuit. The 4.8-mm×4.7-mm chip contains 7100 DCFL gates. The maximum operating frequency was 1.2 GHz at room temperature with a power dissipation of 3.7 W. The single-chip throughput was 9.6 Gb/s. An experimental 4-to-4 ATM switching module using 16 switch LSIs achieved a throughput of 38.4 Gb/s

Keywords

B-ISDN; asynchronous transfer mode; buffer storage; digital integrated circuits; direct coupled FET logic; electronic switching systems; field effect integrated circuits; high electron mobility transistors; large scale integration; semiconductor switches; 0.6 micron; 1.2 GHz; 3.7 W; 38.4 Gbit/s; 9.6 Gbit/s; ATM switch LSI; B-ISDN; DCFL gates; HEMT; asynchronous-transfer-mode; broadband integrated services digital network; buffer circuit; direct-coupled FET logic; event-controlled FIFO; first-in first-out; high-electron-mobility-transistor; Asynchronous transfer mode; B-ISDN; FETs; Frequency; HEMTs; Integrated circuit technology; Large scale integration; Logic circuits; Switches; Throughput;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.236172

Filename

236172