DocumentCode
951426
Title
On the design and implementation of a lossless data compression and decompression chip
Author
Royals, D. Mark ; Markas, Tassos ; Kanopoulos, Nick ; Reif, John H. ; Storer, James A.
Author_Institution
Center for Syst. Eng., Research Triangle Inst., Research Triangle Park, NC, USA
Volume
28
Issue
9
fYear
1993
fDate
9/1/1993 12:00:00 AM
Firstpage
948
Lastpage
953
Abstract
A lossless data compression and decompression (LDCD) algorithm based on the notion of textural substitution has been implemented in silicon using a linear systolic array architecture. This algorithm employs a model in which the encoder and decoder each have a finite amount of memory which is referred to as the dictionary. Compression is achieved by finding matches between the dictionary and the input data stream whereby a substitution is made in the data stream by an index referencing the corresponding dictionary entry. The LDCD system is built using 30 application-specific integrated circuits (ASICs), each containing 126 identical processing elements (PEs) which perform both the encoding and decoding function at clock rates up to 20 MHz
Keywords
CMOS integrated circuits; VLSI; application specific integrated circuits; data compression; decoding; digital signal processing chips; encoding; parallel algorithms; systolic arrays; 20 MHz; ASICs; CMOS VLSI chip; DSP chip; application-specific integrated circuits; compression/decompression algorithm; data compression; decoder; encoder; linear systolic array architecture; textural substitution; Algorithm design and analysis; Application specific integrated circuits; Compression algorithms; Computer science; Data compression; Decoding; Dictionaries; Silicon; Systolic arrays; Vocabulary;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.236174
Filename
236174
Link To Document