A novel current-mode sensing scheme for magnetic tunnel junction MRAM

Author

Au, Edward K S ; Ki, Wing-Hung ; Mow, Wai Ho ; Hung, Silas T. ; Wong, Catherine Y.

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China

Volume

40

Issue

2

fYear

2004

fDate

3/1/2004 12:00:00 AM

Firstpage

483

Lastpage

488

Abstract

In this paper, we present two integrated circuits for sensing data nondestructively from one-transistor one-magnetic tunnel junction (1T-1MTJ) magnetoresistive random access memory (MRAM). The first one is a low-power sensing circuit for MTJs with a magnetoresistance (MR) ratio larger than 10%, and the second one is a high-sensitivity switched-current sensing circuit for MTJs with an MR ratio as low as 5%. The circuits are designed using 0.60- and 0.18-μm CMOS processes, and their performance is verified using HSPICE. Compared with existing sensing circuits at a power supply of 3.0 V, their read access time is 1.46-3.33 times faster and power consumption is 2.67-3.85 times smaller.

Keywords

CMOS integrated circuits; CMOS memory circuits; SPICE; nondestructive testing; random-access storage; tunnelling magnetoresistance; 0.60 micron; CMOS processes; HSPICE; MRAM; current-mode sensing scheme; integrated circuits; magnetic tunnel junction; magnetoresistance; magnetoresistive random access memory; one-transistor one-magnetic tunnel junction; power consumption; switched-current sensing circuit; Anisotropic magnetoresistance; Giant magnetoresistance; Gold; Magnetic circuits; Magnetic materials; Magnetic switching; Magnetic tunneling; Operational amplifiers; Random access memory; Tunneling magnetoresistance;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/TMAG.2004.824102

Filename

1284450