Title :
Sampling and quantizing noise minimization of a digital phase locked loop
Author :
Biswas, B.N. ; Ray, S.K. ; Majumdar, T. ; Bhattacharya, A.K.
Author_Institution :
Burdwan University, Burdwan, India
fDate :
7/1/1978 12:00:00 AM
Abstract :
In this note a new technique of minimizing the sampling and quantizing jitter of a digital phase locked loop has been suggested. Also presented are the experimental results in support of the conclusions.
Keywords :
Digital control; Digital-controlled oscillators; Frequency synchronization; Jitter; Phase locked loops; Phase noise; Physics; Sampling methods; Voltage control; Voltage-controlled oscillators;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/PROC.1978.11025
