DocumentCode
953096
Title
Sampling and quantizing noise minimization of a digital phase locked loop
Author
Biswas, B.N. ; Ray, S.K. ; Majumdar, T. ; Bhattacharya, A.K.
Author_Institution
Burdwan University, Burdwan, India
Volume
66
Issue
7
fYear
1978
fDate
7/1/1978 12:00:00 AM
Firstpage
806
Lastpage
807
Abstract
In this note a new technique of minimizing the sampling and quantizing jitter of a digital phase locked loop has been suggested. Also presented are the experimental results in support of the conclusions.
Keywords
Digital control; Digital-controlled oscillators; Frequency synchronization; Jitter; Phase locked loops; Phase noise; Physics; Sampling methods; Voltage control; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1978.11025
Filename
1455294
Link To Document