DocumentCode
953328
Title
Comments on \´Split ADC\´ architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC"
Author
Jipeng Li ; Un-Ku Moon ; McNeill, John A. ; Coln, M.
Volume
41
Issue
6
fYear
2006
fDate
6/1/2006 12:00:00 AM
Firstpage
1481
Abstract
For original article by J. McNeill et al. see ibid., vol.40, no.12, p.2437-45, Dec. 2005.
Keywords
analogue-digital conversion; calibration; 16 bit; deterministic digital background calibration; split ADC architecture; Calibration; Computer science; Data mining; Moon; Signal processing; Silicon; Solid state circuits; Very large scale integration;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2006.875939
Filename
1637612
Link To Document