A 20-Gb/s flip-flop circuit using direct-coupled FET logic

Author

Shikata, Makoto ; Tanaka, Koutarou ; Yamada, Hiromi T. ; Fujishiro, Hiroki I. ; Nishi, Seiji ; Yamagishi, Chouho ; Akiyama, Masahiro

Author_Institution

OKI Electric Ind. Co. Ltd., Tokyo, Japan

Volume

28

Issue

10

fYear

1993

fDate

10/1/1993 12:00:00 AM

Firstpage

1046

Lastpage

1051

Abstract

A new type of direct-coupled FET logic (DCFL) flip-flop called the memory cell type flip-flop (MCFF) is presented. The MCFF operates faster than conventional DCFL flip-flops and enhances the DCFL´s advantages, such as low power consumption and high packing density. A D-flip-flop IC and a 1/8 divider IC were developed using the MCFF. These ICs were fabricated using 0.2-μm-gate pseudomorphic inverted HEMTs. The D-flip-flop IC is confirmed to operate up to 20 Gb/s. The 1/8 divider is toggled up to a maximum frequency of 25 GHz. These results prove that the MCFF enables DCFL circuits applicable not only to large-scale integration but to small-scale and medium-scale integration operating up to 20 Gb/s as well

Keywords

direct coupled FET logic; field effect integrated circuits; flip-flops; high electron mobility transistors; integrated logic circuits; 0.2 micron; 1/8 divider IC; 20 Gbit/s; 25 GHz; D-flip-flop IC; DCFL; MCFF; direct-coupled FET logic; flip-flop circuit; high packing density; low power consumption; memory cell type; pseudomorphic inverted HEMTs; Clocks; Energy consumption; FETs; Flip-flops; HEMTs; Inverters; Large scale integration; Latches; Logic circuits; Master-slave;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.237520

Filename

237520