DocumentCode
954786
Title
Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines
Author
Almukhaizim, Sobeeh ; Drineas, Petros ; Makris, Yiorgos
Author_Institution
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
Volume
25
Issue
8
fYear
2006
Firstpage
1547
Lastpage
1554
Abstract
This paper presents discuss the problem of parity-tree selection for performing concurrent error detection (CED) with low overhead in finite state machines (FSMs). We first develop a nonintrusive CED method based on compaction of the state/output bits of an FSM via parity trees and comparison to the correct responses, which are generated through additional on-chip parity prediction hardware. Similar to off-line test-response-compaction practices, this method minimizes the number of parity trees required for performing lossless compaction. However, while a few parity trees are typically sufficient, the area and the power consumption of the corresponding parity predictor is not always in proportion with the number of implemented functions. Therefore, parity-tree-selection methods that minimize the overhead of the parity predictor, rather than the number of parity trees, are required. Towards this end, we then extend our method into a systematic search that exploits the correlation between the area and the power consumption of a function and its entropy, in order to select parity trees that minimize the incurred overhead. Experimental results on benchmark circuits demonstrate that this solution achieves significant reduction in area and power consumption over the basic method that simply minimizes the number of parity trees.
Keywords
entropy codes; error correction; error detection codes; finite state machines; parity check codes; concurrent error detection; entropy-driven parity-tree selection; finite state machines; lossless compaction; off-line test-response-compaction; on-chip parity prediction hardware; online test; power consumption; Automata; Automatic test equipment; Benchmark testing; Circuit testing; Compaction; Energy consumption; Entropy; Hardware; Minimization; Performance evaluation; Concurrent error detection (CED); entropy; on-line test; parity trees;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2005.855933
Filename
1637743
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