DocumentCode :
954808
Title :
Berger check prediction for array multipliers and array dividers
Author :
Lo, Jien-Chung ; Thanawastien, Suchai ; Rao, T.R.N.
Author_Institution :
Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
Volume :
42
Issue :
7
fYear :
1993
fDate :
7/1/1993 12:00:00 AM
Firstpage :
892
Lastpage :
896
Abstract :
The authors present closed-form check-predicting equations for deriving Berger checks (J.M. Berger, 1961) for array multipliers and array dividers, respectively. Braun´s array multipliers and Guild´s array dividers are examined. Example check circuits are also presented
Keywords :
digital arithmetic; dividing circuits; multiplying circuits; Berger check prediction; array dividers; array multipliers; closed-form check-predicting equations; Business continuity; Circuit faults; Computer errors; Digital arithmetic; Equations; Hardware; Information technology; Logic; Process design; Redundancy;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.237731
Filename :
237731
Link To Document :
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