Title :
Improvements to binary floating-point digital differential analysers
Author_Institution :
Plessey Research (Caswell) Ltd., Allen Clark Research Centre, Towcester, UK
Abstract :
A description is given of a novel method of providing a residue in a binary floating-point digital differential analyser. The error bounds for a sine/cosine generator utilising floating-point integrators employing Euler integration both with and without a residue are given and compared. Also described is a method for avoiding the extra delay incurred in using an Euler integrator module as a coefficient multiplier.
Keywords :
digital arithmetic; digital differential analysers; virtual machines; Euler integration; binary floating point digital differential analyser; coefficient multiplier; error bounds; integrators; residue; sine/cosine generator;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19800242