Compilation of process algebra expressions into delay-insensitive circuits

The main advantage of delay-insensitive design of circuits is that it ensures that circuits function correctly independently of delays in their components and wires. Timing constraints do not have to be considered, which facilitates top-down design. Process algebras provide a suitable formalism for specification, design and verification of concurrent systems, but there are few methods for practical compilation of electronic circuits using these algebras. The paper illustrates such a method for the compilation of algebraic expressions to delay-insensitive circuits. Compilation is facilitated by the use of two new forms of the decision wait element. The implementation of these elements is also examined.